CLP - Conformal ow power

[limitless_21]

Hi All,

Wanted to know what all do we verify when we are running Conformal Low power on the design along with the CPF file included in it.

thanks
Limitless_21

 

[nitint08]

1. Completeness of power-intent (i.e. CPF) written.
Here you identifies, power-domains which are not specified with respective strategies.
power-domains where false and redundant strategies have been specified.

Correctness of various strategies specified for
isolation
level-shifting
retention
Defining correct power-switches
Specifying correct global-connections those are needed.

2. Once this is done, than try identify and checks the correctness of different power-cells
placed in the design as per various strategies.
here it is checked these cells are powered with correct supply as specified in
CPF
checking various control-signals being reaching in expected manner.
3. Once power-logic is being checked, than supply related checks are performed which
identifies any discrepancy found between CPF and design.

Regards
NitinT

 

[layowblue]

Hi NitinT

Could you share some of your verification experience concerning CLP?
I was involved in debugging CLP simulation failures with Cadence tools, and we found Cadence not fully supporting CLP in current simulation tool.
A lot of time was spent on gate-level sim analyzing X values which turns out to be tool limitations.

Do you know of other tools that handles CLP simulation reliably and maturely?

Thanks
Leo