Alauddin123
Newbie level 5
Hi All,
i have a design which has 125Mhz Ip clk coming from onboard oscillator.
I then generated many frequencies(div2,div4 etc) using MMCM_ADV for different modules.
Now i wanna probe the signals in each module and see them in logic analyzer.
But tool is throwing error like the clock for debug_hub is not a free running.
so is it like each and every ILA needs clock coming from onboard osc ?
But its frequency is diff then the frequency of signals i probed as they wer running on MMCM generated clocks.
How can i probe those signals? what are some standard industrially accepted strategies ?
i have a design which has 125Mhz Ip clk coming from onboard oscillator.
I then generated many frequencies(div2,div4 etc) using MMCM_ADV for different modules.
Now i wanna probe the signals in each module and see them in logic analyzer.
But tool is throwing error like the clock for debug_hub is not a free running.
so is it like each and every ILA needs clock coming from onboard osc ?
But its frequency is diff then the frequency of signals i probed as they wer running on MMCM generated clocks.
How can i probe those signals? what are some standard industrially accepted strategies ?