clock voltage in Switched capacitor CMOS boost (step-up) converter

[khaled2k]

Hi all,
I am designing a CMOS DC/DC converter. If the specs are VDD=5V and VOUT=20V for ex.
I have a question regarding the clock of the switches. The clock feeds the gates of NMOS transistors for example. If the clock is a pulse with Vh=VDD=5V, this will mean that some switches will not be ON even if clock is high, for example if a switch has VS=15V, Vgate should be more than 15+Vt
Could anyone who designed a practical CMOS step-up converter help me please?

Thanks

 

[leo_o2]

To be easy, you can design asynchronize Step-up DC/DC. The power switch is NMOS(source connected to ground, drain connected to inductor). You can use 5V for gate driving.

 

[khaled2k]

To be easy, you can design asynchronize Step-up DC/DC. The power switch is NMOS(source connected to ground, drain connected to inductor). You can use 5V for gate driving.

leo_o2
Thanks for your reply
my CMOS process does not have inductor. I want to design an inductorless circuit.