MCU= PIC16F1519 (enhanced mid-range)
Language=MPASM
EUSART configured to receive only
I enable and disable the EUSART interrupt at various points in my program. Before enabling the interrupt, I want to be sure the EUSART interrupt flag (RCIF), errors, and associated error flags are clear. This is my first experience with hardware USART or EUSART.
The datasheet for the 16F1519 states that reading FIFO of the RCREG is not a reliable way to clear the framing the error flag (FERR) (See: “Note,” page 243). Since CREN will clear the OERR error, but will not clear the FERR error, I have chosen to use SPEN, which clears both.
My sequence is, therefore, read RCREG X2, toggle SPEN, and enable interrupt.
1) Do you agree with that interpretation of the datasheet and use of SPEN in preference to CREN?
2) Since SPEN clears overrun, overrun error flag, and FERR flag, does it also clear the FIFO? That is, is the double read of RCREG still necessary? I searched the Microchip forum and with Google, and there seems to be a little uncertainty about exactly what resetting with SPEN clears in EUSART. I am assuming it does not clear FIFO or RCIF.
3) Would another sequence, such as clear SPEN, read RCREGX2, enable interrupt, and set SPEN be better? Or, perhaps, clear SPEN and RCREG on leaving the interrupt and not re-enable them until after re-enabling the interrupt. Right now, I am using GIE for interrupt enable, but may change to RCIE and leave other interrupt capability available.
Regards,
John