Clearance between PCB tracks with 300V of potential difference?

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treez

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Hello,
We have a 230VAC offline, non isolated LED lamp with LEDs mounted on MCPCB which sits on an earthed heatsink. Due to space constraints on the MCPCB, we have PCB tracks which have a potential difference of 300V between them, with just 0.3mm of separation. The tracks obviously are covered in solder resist.
Table 6-1 of page 43 of IPC2221 appears to state that this is too little spacing, but is not clear.
However, will we be likely to see flashover, or dielectric breakdown of the solder resist material? Also, why does electrical spacing need to be greater at higher altitudes?…eg, the wider regulatory spacings seen for >3000 metres?

IPC2221 (page 43.....comes up as 53rd page)
**broken link removed**
 

There is a table on page 53 and you case is B4 ( B4 - External Conductors, with permanent polymer coating (any elevation))
In according to this table, the distance should be at least 0.8mm.
 
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Thanks, I wonder what perils will happen if we ship the circuit with this 0.3mm of spacing between the tracks which are 300V apart in voltage?

Will we see dielectric breakdown of the solder resist?
Or will we see the conductors flashing over and arcing?.....even though they are both insulated from each other with the solder resist which covers them.
What kids me is that the PCB tracks are on MCPCB...and the MCPCB sits on an earthed heatsink...so therefore all the tracks are only effectively separated form the earthed heatsink by the 60um of insulator which covers the MCPCB. Do you think we need a thermally conductive/electrically insulating pad between the MCPCB and the Earthed heatsink?

If the voltage difference breaks down the solder resist so that the tracks short to each other, then that would blow the fuse, so it wouldnt harm anyone. So do you think we will be ok to ship?
How many weeks of 10-hours-a-day operation woudl have to occur before our solder resist insulator got blitzed by the 300V of potential difference between the tracks which are 0.3mm apart?

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What kids me is that the PCB tracks are on MCPCB...and the MCPCB sits on an earthed heatsink...so therefore all the tracks are only effectively separated form the earthed heatsink by the 60um of insulator which covers the MCPCB. Do you think we need a thermally conductive/electrically insulating pad between the MCPCB and the Earthed heatsink?
 

Anything may happen, I cannot know it.But the regulations are important for the security so that if something happens due to any violation of the regulations, you'll have a headache.
You're saying if the voltage breaks down the solder resist the fuse will be blown.If it refuses to break up the circuit on time and an incident of fire appears ??If I were you I didn't take this risk.
I suggest you not to force the technical barriers to earn something.As Americans say " safety first"..
Yo can test this system in some harsh conditions such as high temperature, instant voltage bouncing,overload and under-load etc. But all of them will not guarantee you that won't be anything happen.
These are unpredictable things and even big companies cannot preview such events. ( Samsung's battery incidents)
 
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Thanks, i dont think there will be fire, the MCPCB is enclosed in a enclosure full of non flammable materials.
I think we agree that no problem will result which is directly caused by the 0.3mm of spacing between tracks with 300V of difference?...since they are covered in solder resist.

I appreciate regulations....but they are to at least a degree written as a factor of protectionism of whichever market by influence of whichever large engineering corporation is acting with self-interest.

The following website shows how the flashover distance for conductors which are 1000V apart is 0.13mm....

https://www.cirris.com/learning-center/calculators/50-high-voltage-arc-gap-calculator

....so us having 0.3mm of distance with 300V of potential difference will surely bring about no problem whatsoever?

I once went for a job at a missile detonator company. The Detonator voltage was some several kV, and they simply couldn't achieve anywhere near regulatory spacings between conductors...but none of their products suffered problems due to the non-regulatory spacings.

It is simply impossible for anyone to be physically harmed by us having a spacing of 0.3mm between our traces which are 300V apart...surely you agree?
 


All creepance distance specifications above absolute minimal clearance according to dielectric breakdown voltage are imposed by the possibility of long term degradation and related insulation failure. In so far the detonator circuit example misses the point, lifetime in powered state is pretty short.

The advantage of standards is - besides providing safety - that engineers can base their design on it without starting basic research work each time a new. If your circuit isn't safety critical in any regard and doesn't need to approved anyhow you can qualify the long term reliability yourself by performing your own test series.

I won't particularly harp on about IPC rules, you can also refer to industry standards like IEC 1010, but you'll find out that they end up with similar spacing values for 300 V.
 
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Thanks, and I use the following example to support my claim about the righteousness of using PCB spacings considerably less than what the standards require (eg IPC2221 and IEC 60950)……in this case, the situation of inadequate spacings seen in offline SMPS……

The above quote is taken from the following….
https://www.smps.us/pcbtracespacing.html

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All creepance distance specifications above absolute minimal clearance according to dielectric breakdown voltage are imposed by the possibility of long term degradation and related insulation failure.
Thanks, i dont suppose you know how long it takes for solder resist to suffer dielectric breakdown, when it has 300V across it?
 

TO220 pin spacing is a good example. High quality switch mode power supplies have often milled slits beneath the drain terminal to increase creepage. I saw a cheap product failing due to drain terminal flashover.
 
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You can stagger the pins...
I don't know where you work but if you are ignoring advice that everyone else uses for spacing you are being stupid and dangerous, you have to follow the guidelines that is what they are there fore. I am amazed at anyone would start a thread like this, its like kindergarten design...
Again with the political content, this is an electronics forum, not a political mouthpiece for the far left, use an appropriate forum for the political rants...
 
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You can stagger the pins...
Thanks, yes, but that doesnt address the fact that at the body of the TO220, the pins are closer than regulations allow. Its a dramatic breach of clearance regs, and almost everybody does it.

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High quality switch mode power supplies have often milled slits beneath the drain terminal to increase creepage.
Thanks, i must admit ive never seen this in products we've taken apart...i would have thought there was danger of ESD damage to the FET if its body was milled?

We milled some copper off some 200PCBs and virtually all came back failed due to ESD weakening. The ones that didnt have the milling done, did not fail.

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So, We are designing a 150W offline, non isolated LED lamp. We have a string of 100 LEDs as the load…it’s a 300V LED string and is on an IMS PCB.
What isolation voltage rating do we need of the IMS PCB?……
https://www.technoboards-kc.com/fileadmin/downloads/datenblaetter/tK_IMS-factsheet.pdf
…Presumably the 1500VAC one or more?

Its pretty amazing that the 100um of dielectric on the IMS PCB can stand off this non isolated 300V….i mean, the table on page 43 of IPC2221A gives clearance requirements of 0.4mm minimum for such voltages with “Polymer coating”. What is so special about the dielectric coating of the IMS PCB that it can get away with spacing of just 100um?
Presumably if solder resist was made of such material then the IPC2221A spacings would also be in the 10’s of um range?

53rd page shows regulation clearances (IPC2221A)
**broken link removed**
 

Hi,

Thanks, i must admit ive never seen this in products we've taken apart...i would have thought there was danger of ESD damage to the FET if its body was milled?
The milling is in the PCB and not in the FET package.

And don´t mill a PCB with assembled semiconductors on it.

Klaus
 
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I am confused now. I thought the idea was to have and indention between traces to increase the creepage distance. The indention would create a longer distance along the surface but not increase the straight line distance between traces.

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What exactly is meant by milled some copper off. Was this off the width of the trace or all the way through substrate.
 
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The milling is in the PCB and not in the FET package.
Thankyou...and im sure you will appreciate that the milling on the PCB can do nothing about the insufficient clearance that exists between drain and source on the actual body of the TO220 itself......this is in direct contravention to all EN standards, and shows what a horrible mess the standards are in. Virtually every offline PSU that uses TO220 FETs is in direct violation of the EN standards. We need to use TO220. How do we get round this, do we just need big lawyers?
 

In one of the links you provided it speaks of the difference between functional insulation and other types of insulation. Maybe this is how they get around the minimum clearances. As long as it can pass the hipot test.
 

Hi,

there is functional isolation. If there is a sparc across this isolation barrier, then no-one gets hurt. Maybe it causes a light to flicker or a motor to move.

One example for both isolations is a relay:
* between the contacts you have functional isolation (unless it is a safety relay with special requirements)
* between coil and contacts there usually is safety isolation.

according EN50178...
* the functional isolation on a PCB with 300V RMS may go down to creepage 0.75mm (air gap 0.5mm)
* the safety isolation for a 300V RMS may go up to 10mm creepage

Klaus
 

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