Clarification about CMOS transistors nominal voltage

[eti26000]

Hello everyone, I am currently working on a project where I need to design an OPamp which has a VDD between 2V and 2.5V.

For this, I want to use transistors which have 1.8V as nominal value.

My question is, it is fine to use VDD higher than nominal value if we make sure that every individual transistor has voltage across them below 1.8V ?

Like, is the image below a fine operating point for 1.8V transistors ?

 

[dick_freebird]

In regular CMOS there is an inescapable G-B oxide limit. Multi well or SOI free the body. The "rating" however tends to be about hot carrier drift at min L max Vdd low temp (with maybe a side of NBTI).

I have done numerous parts on SOI using cascading but there are key process features you need