I am designing a charge scaling DAC. I was wondering what distance should be used between the capacitors in a capacitor array DAC? I imagine that using minimum distance between (poly-poly) capacitors is not ideal due to increase in the parasitic capacitance via the fringing capacitance?
You probably need 2 or more metal lines for the connectivity between the single PP-caps of the array, hence the P-P parasitic fringe capacitance between the individual caps won't matter - the top plates are far from each other, anyway. The metal wires' parasitics probably determine the achievable accuracy.