analog_chip
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Hi,
I am using RF probes to introduce 2.4GHz to a matching network (ONCHIP) from a signal generator. I want to know approx. parasitic capacitive loading (paralle C from input to ground) at the input due to signal generator+coax+rF probes. I want to design matching network accordingly to account for this.
I am using RF probes to introduce 2.4GHz to a matching network (ONCHIP) from a signal generator. I want to know approx. parasitic capacitive loading (paralle C from input to ground) at the input due to signal generator+coax+rF probes. I want to design matching network accordingly to account for this.