Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I am trying to layout interdigitated electrodes (attached image) in the top metal layer in CMOS 180nm. I was wondering how I can extract the parasitic capacitance between the two electrodes.
If you are working in a mature, "big name" tool from a
foundry that does good PDKs, the parasitics extraction
should cough up a capacitor for this structure and you
could dig for it in the analog_extracted (or whatever, if
it's not Brand C) view by select-by-net or selecting the
instance by area. If you put probes on both nets then
which of the many pcapacitor instances is the right one
will be visually obvious.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.