Can't make oscillator with CMOS inverter

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thranduil

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Hi all guys,

I am trying to make an oscillator using CMOS inverter for quite some time and it won't oscillate at desired frequency.
I want to make 125 KHz oscillator using following schematic (the element values are not relevant for desired frequency):


The circuit simply won't oscilate for every combination of L and Cs. I am aware that inverter provide -180 phase shift. So, the feedback circuit should provide also -180 degree and it should work if the loop gain is higher than one. I have L of unknown value (at th emoment it is a secondary of a 220 to 12.6 V transformer), and capacitors are of 1 nF. In this configuration oscillations have frequency of 1 MHz. As soon as I change to another secondary (for 6.3 V and less) it doesnt oscillate. So, how can I debug this?

Thanx
 

Hi,

for oscillation you need 180 degree phase shift.
Because C2 is directely connected to the output of the inverter, there is no possibility to calcualte it´s phase shift.
Add an R (or L) between output and capacitor.
Try with 60 degree phase shift from output to capacitor.

*******
Try a higher overall impedance (lower value capacitors)
A standard transformer is no good selection for an oscillator. It is built for 50/60Hz not for 125kHz.
The core will generate more losses (resisitve) than act as an inductivity.

Klaus
 

Hi,

I added 10k trimmer potentiometer between output and feedback loop. With higher values, above 5k I would say the oscillations diminish. However, there should be output resistance of the inverter which allows phaseshift?
As for transformer coil used as an inductor, I must say that I already have oscillations at 1 MHz and I think it should work in the same way for 125 KHz.
Does this feedback circuit provides 180 degrees shift at resonant frequency? If yes than the problem can only be in gain condition. How transocductivity influences design? Is there any place where I can put pot and tune untill it works?

Thankd and cheers
 

Hi,

standard transformer and oscillations of 1MHz:
I bet this is not caused by the core inductivity but stray inductivity.

******
However, there should be output resistance of the inverter which allows phaseshift?
Click to expand...
You need a voltage to voltage phase shift.
--> [inverter output voltage] to [capacitor voltage]. Without a series resistor (or inductivity) both voltages are the same. --> No phase shift.


maybe you talk about the inverter´s internal output resistance. For sure there is. But it is not to calculate with.
There are so much parameters that have influece on this. (supply voltage, output voltage, temperature, manufacturing, ....)

Klaus
 

An ordinary CD4xxx Cmos inverter with a low supply voltage CANNOT directly drive a capacitor at its output because its maximum output current is very low.
A 74HC high speed Cmos inverter has MUCH MORE output current so it might work in your circuit.

If you are using an ordinary low current CD4xxx Cmos inverter then why don't you make a simple RC oscillator using two inverters or use a single Schmitt-trigger inverter to make it?
 

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Hi,

@Audioguru: I actually want sine wave, so I will ommit the second inverter in the circuit i provided. That can be the clue, but i don't understand that completely. I saw people giving answers like with X transconductance with that capacitance it will work. That is something similar to your suggestion that CD4xxx can't drive capacitor. I would be really happy if u can explain me what tha practically means. Shouldn't that just lower oscillation amplitude?

By the way I use 12V supply voltage.
I tried to analyze this circuit. I modeled it as a current source (mosfet should be voltage controlled current source in the linear region) with some internal reistance. I got third order low pass filter but still don't know what to do with that actually. If you )Klaus) suggest me to add some resistance in series with output, I suppose it should be 10 times higher than max output resistance of the inverter itself? So, when I added 10k oscillations diminished. I suppose that resistor only influences feedback loop tranfer function and no inverters characteristics?

Thanks
 

Hi,

first:
if you speak of CMOS inverter, then do you mean CD40xx?.
For sure one can make them oscillate, and with some fiddeling you may get something like sine.
But the CD40xx things are made for digital applications. And making the output 125kHz sine is misuse in my eyes.

There are much more stable circuits to produce sine output.

*******
LPF:
I don´t call it third order, because the first stage is something undefined without the series resistor.

***

I don´t know what your CD40xx output impedance is. 10 times this for the resistance is good. Use at least three times.
For 60 degree phase shift you need R to be 1.7 x Xc. (without including the LC)
Xc is about 1.3kOhms. so R needs to be 2k2. If this is too low load impedance for the CD40xx you need lower value Cs. (... and then new R calculation)

Klaus
 

Hi,

yes, I speak concretely about CD4007, 2 complementary pairs and one inverter in the same chip. It might be misuse, but since it has negative transcoductance in the transition region, it should be nice for oscilators. This should be only for testing purposes so it should have been fast solution, unfortunately it lasts now for some days.

Before I started I thought that this circuit will more or less always work, for every combination of LC inside the nominal amplification range of inverter, but obviousely not.
My first try was with 68 nH and I some microfarads and it didn't work.
 

It's possible you are getting insufficient voltage swings at the inverter inputs.

Your LC loop may need more current to operate it, than your inverter gates can put out.
 

The three inverters in a CD4007 work the same as the six inverters in a CD4069.
Here is a graph that shows up to 1MHz is possible with a gain of almost 30 times into a high impedance load with a 10V to 15V supply. The distortion is fairly high at high levels but is low at lower levels. More negative feedback reduces the gain and reduces the distortion.
Then you can make any analog oscillator circuit like Wien Bridge or Phase Shift:
 

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Hi all again,

I finally made this work. It oscillates and it's fine. However I would like to know how circuit exatcly works, especially why it oscillates at the frequency 1/(2*pi*sqrt(LC)). Where does the phase shift in the feedback loop come from?

Thanx
 

Ideal effects on Simple LC CMOS logic inverter Oscillator



1st verify both your Vo=Vin=Vdd/2
2nd verify the transformer does not enclose any other parts. ( eg diodes)

I assume you want a square wave not a buffered sine wave.
Everytime I check any unbuffered brand of CMOS gates at 5~12V, I get 20dB gain and buffered CMOS gates 60dB. Your mileage may vary.

If the loss in the filter is less than the gain in the inverter, it will oscillate. If the filter impedance is too low relative to the output impedance of CMOS, you get attenuation.

Usually old CD4xxx was 300~500 Ohms rise with lower voltage.
Newer 3V3 ALCV2 logic is 25 Ohms.

Your 0.1uF/1mH/0.1uF filter is ~130 Ohms @ 25kHz
If you had 1mH then 125kHz would be obtained with 1nF each.

Since you don't , your inductance must be lower than you think..

Check the gain of your gate and loss of your filter after Vdc for In,Out

Then report back more details like part numbers, supply voltage, photo layout, scope pix.

details details details,.... the 3 D's of Engineering.....

- - - Updated - - -

thranduil said:
Hi all again,
Where does the phase shift in the feedback loop come from?

Thanx
Click to expand...


The 3 reactive elements is an LC // resonant circuit that has 180 deg phase shift at resonance.
The 2 caps are in series. as one, via ground.

The more experienced Engineer may appreciate the LC is a LPF which blocks the harmonics enough to make a sine wave.

There are nonlinearities in the input and out impedance but the filter creates the sine and the inverter amplifies it. THe impedance at resonance will affect the attenuation of the filter. Normally a few kOhm is put in series from output to 1st cap to reduce loading effects on square wave without affecting circuit behavior much.


Above Falstad link

Adding 100K to output is reducing signal but harmonics even more,
thus filter Cap current is void of distortion ( Signal 2 ) 1k~10k is preferred for series R
but for higher Z filter, not required.
 

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