rakeshk.r
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HI, I have a compilation error: "Type conversion (to SIGNED) can not have aggregate operand." My guess is that there might be an issue with conversion from real type to signed. Any help to resolve this issue is greatly appreciated. Thank you.
Code:
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
USE ieee.math_real.all;
ENTITY test_lut IS
-- Declarations
Generic (K : integer := 4);
Port( x : in unsigned(3 downto 0);
y : out signed (26 downto 0));
ARCHITECTURE logic OF test_lut IS
function my_exp(i : integer) return signed is
begin
return signed(exp(-(real(i)/16.0**K)), 27); -- error is shown in this line.
end function;
BEGIN
y <= my_exp(0) when x = "0000" else
my_exp(1) when x = "0001" else
my_exp(2) when x = "0010" else
my_exp(3) when x = "0011" else
my_exp(4) when x = "0100" else
my_exp(5) when x = "0101" else
my_exp(6) when x = "0110" else
my_exp(7) when x = "0111" else
my_exp(8) when x = "1000" else
my_exp(9) when x = "1001" else
my_exp(10) when x = "1010" else
my_exp(11) when x = "1011" else
my_exp(12) when x = "1100" else
my_exp(13) when x = "1101" else
my_exp(14) when x = "1110" else
my_exp(15) when x = "1111" ;
END ARCHITECTURE logic;
END test_lut ;