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Yes, it can be perofrmed to analog_extracted.
The way just like schematic monte carlo simulation, But the netlist file includes more parasitical capacitors and resistors.
one doubt regarding monte carlo ... I was trying to perfrom the analysis in cadence with process mismatches for my comparator . I got an error stating that the tool could not find the process mismatch file .... where and how can i solve this problem of process mismatch ...I use UMC_180_CMOS model files ......
i have the same problem in umc_130_cmos first you try to find the transistor model in your kit see if there a section for statistical model that is used for monte carlo if not you will have to write it your self
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