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Can I use Native NMOS to design an RF power amplifier?

rickyLu

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Native NMOS devices have a near-zero threshold voltage, which makes them very suitable for power amplifier design. However, I rarely see any articles that use this device to design an RF power amplifier. Why is that?
 
Solution
You can, and most "RF CMOS" offers one. It may
be limited to the final stage and the highest frequency
roles due to its poor control. But a 50-ohm load will
tolerate that leakage just fine.

When it's the only transistor (like a LNA) and the
biasing can be done with "steadier hands" the
native / intrinsic FET is often the right choice.

I don't think that choosing between VTs of FET
flavors is a topic for a real groundbreaking IEEE
paper. More like a basic trick of the trade. So it
may go generally undiscussed.
You can, and most "RF CMOS" offers one. It may
be limited to the final stage and the highest frequency
roles due to its poor control. But a 50-ohm load will
tolerate that leakage just fine.

When it's the only transistor (like a LNA) and the
biasing can be done with "steadier hands" the
native / intrinsic FET is often the right choice.

I don't think that choosing between VTs of FET
flavors is a topic for a real groundbreaking IEEE
paper. More like a basic trick of the trade. So it
may go generally undiscussed.
 
Solution
You can, and most "RF CMOS" offers one. It may
be limited to the final stage and the highest frequency
roles due to its poor control. But a 50-ohm load will
tolerate that leakage just fine.

When it's the only transistor (like a LNA) and the
biasing can be done with "steadier hands" the
native / intrinsic FET is often the right choice.

I don't think that choosing between VTs of FET
flavors is a topic for a real groundbreaking IEEE
paper. More like a basic trick of the trade. So it
may go generally undiscussed.
Thanks, I'm just wondering whether native NMOS can be used in RF PA design. Based on your explanation, it seems that native NMOS is a very suitable choice for the final stage of a high-frequency power amplifier implemented in bulk CMOS—say, using a 40nm CMOS process targeting D-band frequencies. Would you agree?
 


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