Typically you can use a GPIO pin as a flag, and use its interrupt capability
to do an interrupt when you write to the GPIO. Thats more of a standard
HW approach.
Or use Verilog solution to manage monitoring of a bit in a variable and
trigger an interrupt. ARM and appropriate IDE can handle that, like a
PSOC. The compiler/linker has to know the address of the variable, thats
easily handled.
In PSOC could use a control reg (it can be 8 bit) as a variable and do this :
The compare is multi compare selectable>,<, <=......
Could even add HW between Control reg and ISR to logically qualify it.
Could replace digital comp with a LUT and implemented it as a state machine or
a simple PLA to qualify ISR from the variable.
Regards, Dana.