Can I put digital standard cells in a Deep N-Well（DNW）

[Bruce Ma]

Can I put digital standard cells in a Deep N-Well（DNW）？
In my circuit, there exists an analog block and a digital block at the same time. I wish the noisy digital block has as little effects on the analog block as possible, so I put the digital block in a DNW. However, when I run LVS, the error of "bad component subtype" was reported, because the normal NMOS in the standard cell has become a dnw NMOS. Owing to the fact that there is no DNW standard cell library, how could I put the digital block into a DNW?

 

[dick_freebird]

Your NMOS will sit in Pwell either bare or inside DNW depending on whether you want to float local Vss from Psub. A sinker associated with DNW provides the "walls" while DNW is the "floor" of the tank.