Can I leave the deep N-Well terminal floating?

[ccw27]

For P+ Poly Resistor is it ok to leave the Deep N-Well terminal floating? How about for Inductor? Can we leave it floating in general?

I ask this question cuz for p+ guard ring it is advisible to use a dedicated potential to bias it otherwise it increases coupling.

So if I don't have a dedicated potential for Deep N-Well P+ Poly Resistor or Inductor is it ok to leave the terminal floating? Will there be any side-effect? Will the device change characteristic once it comes back from fabrication? I believe there is no reverse or forward bias issues if you leave it floating. Any comments will be appreciated !

Thanks

 

[chinito]

Re: Deep N-Well Question

The model file for P+ poly resistor might hold answers. I've seen a small resistor that's formed between P+ and Nwell that has -ve TC and +ve VC. I've also simulated designed with bulk floating. They work OK but who knows what will happen after fabrication. Why not connect it if you can.

 

[ccw27]

Re: Deep N-Well Question

I heard that its recommended to tie to clean Vdd or gnd but if you don't have that at your disposition then you should leave the terminal floating