Can a FPGA be configured to be a RAM?

[kostbill]

fpga with ram

Hello, I am new here.

I have never programmed before an CPLD/FPGA, only microcontrollers.
I bought that book, "Advanced Digital Design with the Verilog HDL" by
Michael D. Ciletti but now I think it is only for advanced users, I think
I will start again with some internet tutorials and then try to read it.

Most of all I think that the timing issues are the most difficult, but I will
see that problem later.

My problem, for now, is that in a project I must have a small RAM and
interface it with some logic, CPLD I think, so, this is my question, can
I have an FPGA divided in two parts? The first will be the logic required
and the second will be the RAM? I don't mean to create a RAM from
schematic, my question is if the FPGA can be configured to be a RAM.

I hope I made this question clear, else, forgive me for my english.

Thanks a lot.

 

[arunragavan]

Re: FPGA as RAM

Actually speaking you can be used as RAM.

You can use the onboard memory avilable on a FPGA.

To use the onboard memory resources you will need to use a RAM module from the LPM library.

LPM is the "library of parameterized modules".

"The LPM standard is an extension to the Electronic Design Interface Format (EDIF), which is an industry-standard syntax for transferring designs between the tools of different EDA vendors. Before the LPM, EDIF netlist files would typically contain architecture-specific logic functions. The LPM provides an architecture-independent library of logic functions or modules that are parameterized to achieve scalability and adaptability. Designers can vary the parameters to represent a wide variety of logic functions, greatly simplifying design entry tasks.

The benefit of all this is that you can actually instantiate an LPM RAM module of various configurations in your code. The Altera or other vendor tools will automatically use the appropriate on-board resources for the job. You can run the same verilog on Xilinx FPGA's as well without modification even though Xilinx has a different memory arrangement.


Hope this tip might help you..

If you need more just feel free to contact me..

correct me if am wrong..

with regards

 

[ljunesnow]

Re: FPGA as RAM

i think maybe u should learn about FPGA structure first. there are certain number of ram bit in fpga. so your idea here should be possible.

 

[dddhacker]

Re: FPGA as RAM

Hello

In case of xilinx FPGAs, The FPGA contains a certain amount of Block RAMs and distributed RAM. For eample SpartanIIE 300 conatins 96kbits of distributed ram and 64Kbits of Block RAM arranged as 4kbit blocks. You will have to see the documentation for your specific FPGA to see what RAM resources it contains.

 

[xwcwc1234]

Re: FPGA as RAM

To Kostbill,
Would you mind scanned and upload the book "Advanced Digital Design with the Verilog HDL" by Michael D. Ciletti here ?

 

[umairsiddiqui]

FPGA as RAM

why donot you use Xilinx core generator, It will
make parametrized RAM/ROM cores of different sizes etc.

Please provide more info about LPM...availbility of free documentation, free (VHDL/Verilog) libraries/ implementations based on LPM, free tools(their names...)

 

[Vonn]

Re: FPGA as RAM

If you are using Xilinx tech. , there is a very good pdf that can help you to write the exact RAM code which will direct the synthesis tool to creat the RAM kind you want (block or distributed) ... Moreover , this pdf has many examples in verilog and VHDL for the recommened codes of Counters , RAms , Shift registers ,...etc
The pdf name is "Xilinx Synthesis Technology User Guide" and you can download it from this URL : h**p://toolbox.xilinx.com/docsan/3_1i/pdf/docs/xst/xst.pdf

BR, Vonn

 

[agump]

FPGA as RAM

In Xilinx's and Altera's devices, there exists some RAM block . The volume depends on the device's type. You can use them by direct instantializing them. I think you'd better read the reference manual about how to use the onchip RAM