Now I use 5V process to design HV 7.5V, the only problem is that I am not sure if the parasitic diode's (P+ to Nwell, Nwell to Psub, N+ to Pwell) revise voltage can suffer 7.5V in operation and is there any problem? The attachment is the Electircal parameter about this process, but I don't find the information I need. Thanks for your instruction.
Usually it is not recommended to have 7.5V across junctions in a process that is meant for 5V operation.
In process manuals there is usually seperate section for breakdown voltages.
The problem is that if you have high voltages across these parasitic diodes they could breakdown and/or cause reliability problems.
Is the parasitic diode's breakdown voltage higher than mos breakdown voltage(punch through?), right? In the manual the Vds breakdown voltage is about 8V, so if my assumption is true, the parasitic diode's breakdown votlage must be higher than 8V.
Then, If the parasitic diode doesn't breakdown, does this influences the life? My manager says it is similar to zener diode and the life time doesn't change.
Thanks for your instruction.
When you say Vds breakdown, I am assuming you are referring to the actual breakdown of the drain to bulk diode. (In Nmos is the N+ to substrate or N+ to pwell and in pmos it is the P+ to nwell).
If the breakdown is about 8V, then I think you are ok. However, I have seen 5V processes where those diode breakdowns are ~ 7V.
Although this is a zener breakdown, the amount of reverse bias current @ 7.5V probably varies depending on the well or substrate doping. Perhaps you could look at the zener breakdown characteristics for this process you are dealing with.