calculating harmonic currents at the input of Buck converter

[zuq]

Hi guys

I need to calculate the harmonic currents at the input of buck converter so that I can select an appropriate capacitor for the input stage, so that I minimise DC bus voltage ripple and spikes due to stray inductances. How do I get these without performing fourier analysis? is there any simple way of doing this?
Thanks

 

[atripathi]

I don't think there is a way to do this with performing fourier analysis. You can easily get this data from any simulation tool like PSpice.

 

[dick_freebird]

Your input current ripple is trapezoidal, a squarish wave between
IOUT (when HSS on) and zero (when off). On top of this is
superimposed the inductor ripple current which is triangular
during the on phase. The shoot-through current is a spike at
each edge.

So you can take the low frequency as just fSW square wave
of IOUT amplitude (or rectangular, close enough) and the
harmonic series there is well known.

Assume the source supply is constant current at IOUT and
that the input capacitor is entirely responsible for intra-
cycle VIN droop, assign a droop voltage allowed (say, 2%)
and then IoutMax=C*Vdroop/ton(HSS). That's your bulk
cap charge capacity.

For the real nasty stuff, the edge harmonic content, you
can just call that an impulse and harmonics all the way up,
"mobetta" HF capacitance with as low an ESL/ESR as you
can get (or are allowed to put for economic constraints).
Here board layout, the VIN-part-GND-decouple current
loop, is a big deal - and so is selection of measurement
ground point for 'scope work.