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Cadence virtuoso layout-schematic net binding settings shortcut

goatmxj666

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Hello. I am doing layout with cadence virtuoso.

When doing the layout, I need a feature where the net selected in the schematic is reflected and highlighted on the layout.

When I pull out a single mosfet, it shows up fine, but when I pull it out symbolized, the highlighted net doesn't show up.

So I'm manually drawing the metal and pressing Q to set the net name in connectivity tab. I would like to make this process a shortcut.

I want to be able to select a metal in the layout, press the shortcut, select the net I want in the schematic, and it will automatically set to that net name. Any advice on how to do this?

Thanks for reading.
 
When doing the layout, I need a feature where the net selected in the schematic is reflected and highlighted on the layout.
In Layout XL, navigate to Connectivity -> Incomplete Nets -> Show/Hide All. This option will show you all connections between devices.

When I pull out a single mosfet, it shows up fine, but when I pull it out symbolized, the highlighted net doesn't show up.
I don't really understand what you mean here. If you mean that you created a symbol from a MOSFET instance (kind of a wrapper), then in order to see the connections to it, you have to do the layout of this cell first and create corresponding pins.

So I'm manually drawing the metal and pressing Q to set the net name in connectivity tab. I would like to make this process a shortcut.
This should happen automatically if you are using Layout XL. Check that in Display Options (hotkey E) you have Pin Names checkbox active in Display Controls section.


P.S. I would suggest you posting your question in the "Analog Integrated Circuit (IC) Design, Layout and more" section of the forum to get a response quicker.
 
Hi sidun.av. Thank you very much for your answer.

Pressing “Connectivity -> Incomplete Nets -> Show/Hide All.” really helped me a lot.

What I was wondering in my question was,
Suppose I designed the schematic and layout of an amplifier (AMP1), and then used this AMP1 to create another circuit (ADC), then when I do the ADC with Layout XL, I can import AMP1 as an instance via 'connectivity->selected from source'.
But when I try to connect AMP1 with another circuit with metal, the net is not recognized on AMP1.

But if I import it when it is just a single mosfet in the ADC schematic, it automatically has net assigned to the gate, source, and drain.

So I'm temporarily drawing metals on Vin1 and Vin2 of AMP1 and naming the nets net014 and net015 respectively to avoid confusion when doing complex layouts.
I'm looking for a shortcut to shorten this process.

Once again, thank you so much for your response :)
 
First of all, let's make sure that your layout is bound to the correct schematic:
Connectivity -> Update -> Connectivity Reference

When you are attaching metal to the pin of your amplifier, it should display the top-level net name on it automatically. Did you pass LVS on your amplifier? One of my guesses is that you are using an incorrect type of drawing for your amplifier pin.
 


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