cadence schematic and Verilog model

[pthoppay]

verilog from schematic cadence

Hi all,

My complete system has both digital and analog blocks. I want to know is there any way to simulate the complete system where the analog block is designed completely till transistor level and the digital block is represented by Verilog or VHDL code.

Thanks in advance.

Regards

 

[wpchan05]

Hi all,

My complete system has both digital and analog blocks. I want to know is there any way to simulate the complete system where the analog block is designed completely till transistor level and the digital block is represented by Verilog or VHDL code.

Thanks in advance.

Regards

Yes, there are, but they come from cadence's digital tool: IUS.

with IUS, you can invoke spectreVerilog, ultrasimVerilog, or AMS simulator.

 

[JoannesPaulus]

AMS is cadence mixed signal simulator.