Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Cadence Orcad Pspice error (no more threads can be created in the system)

Status
Not open for further replies.

tetsahal

Newbie level 2
Newbie level 2
Joined
Dec 1, 2012
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,302
Hello Everyone
Would you please help me in this problem.

I am using Orcad Cadence 16.3 to simulate AC-DC Flyback circuit, everything is good when I simulate the circuit in the open loop test, while moving to the closed loop when I try to run the simulation to a short time like 0.2s everything is good, but this time in not enough to see the steady state of the circuit, when I run the simulation to time like 0.7s the pspice gives the attached error. I tried to do this in Windows 7 and windows server 2008 R2 with the same result.

Capture.JPG
 

Can you set a value for charge voltage on the output capacitor (and other capacitors)? After power-up, I find that it usually requires many operating cycles until capacitors charge so that a circuit reaches normal running conditions. By setting charge levels at the beginning of the run, you might get to a steady operating state sooner.
 

The design which I am doing is flyback on LED application, so in the output side the LED model contains VDC source. So according to this the output cap has an initial value from the beginning.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top