cadence error running verilogA (SPECTRE-18): Segmentation fault.

[RamyRady_RF]

Hello,

I was trying to rerun the same verilogA code again, but I face this error:

Internal error found in spectre during AHDL read-in, during circuit read-in, during hierarchy flattening,.
Encountered a critical error during simulation. Submit a Service Request via Cadence Online Support, including the netlist, the Spectre log file, the behavioral model files, and any other information that can help identify the problem.
FATAL (SPECTRE-18): Segmentation fault.

any suggestions?

Thanks

 

[pancho_hideboo]

I was trying to rerun the same verilogA code again,
but I face this error:

Show me your Verilog-A code.

 

[RamyRady_RF]

it is indep. of the code, even a cap from ahdLib, or any other veriloga cell

 

[pancho_hideboo]

it is indep. of the code,
even a cap from ahdLib,
or any other veriloga cell

Segmetation Fault is due to your usage of memory violation.

Show me your Verilog-A code.