Any C166 users out here who knows the answer ?
When the C166 is used with byte wide memories a WRH and WRL signal need to be used to write only to one chip when byte accesses are made.
BUT what if a 16 bit wide memory is connected to the cpu ?? In case of a byte write 2 bytes are written at a time, so I don`t understand why here the problem does not happen.
Is it connect that in case of a 16bit mem device A0 of the mem has to be connected t0 A1 of the 166 ?
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Please don't reply unless you have useful information to add on this post.Thanks
If you are connecting a 16 bit memory to the C167, you must indeed connect memory A0 to chip A1, since the memory is 2 bytes wide. Then, the WRH/WRL pin has no use in bus management and may be therefore used in other applications.
I was quite confused on your question, but I think this provides an answer, does it not?
Hi, did you read "The Insider's Guide To Planning 166 Family Designs" from Hitex??? I don't know, but maybe it helps you. This stuff is downloadable from web for free.
in it's default configuration, a C16x uses only one WR signal for 16Bit Memory. With a pull down resistor on P0H.0 you can change the write configuration at startup. Then WR becomes WRL for the lower byte and BHE becomes WRH for the upper byte. In a 8bit/16bit mixed design you must connect WRL to a 16bit device (e.g. 16bit flash).
And you should follow the tip of woodooman, "The Insider's Guide To Planning 166 Family Designs" is a very good refernce for C16x designs.
Actually, you may find valuable having the WRH connectted to the WR pin of the upper 8bit memory chip, and the WRL to the other, since an 8 bit transfer would have to read the existing word in order to write it again. Nevertheless, most of the present-day compilers count on that and transfer mostly 16 bit words (they mirror memory on registers by two bytes), but an assembler programmer could certyaily make user of it on 8-bit parted registers (like writing P0L and P0H or P8 to memory).