I am fixing my setup violations in design by reducing delay of my data path. so will it creat hold violations for these paths. or what are the conditions for which it will creat hold violations at the time of fixing setup?
Re: by fixing setup violations will it creat hold violations
it depends on how u fix setup violations
1. can be register balacing
2. reducing combo logic
3. by clock skewing.
setup fix may lead to hold violations . for example to reduce setup the hold window will get reduced if combo logic is reduced. ot if you skew the clock late setup will improve but hold time will be eaten up
dada
Re: by fixing setup violations will it creat hold violations
Hi dada ,
wht is more crucial , hold violation or setup violation. If we have to choose anyone between them , what will we fix? (I was asked this question in AMD interview) . i said hold is more crucial , bcoz we can fix setup violation after DFM by adjusting clock period , but Hold can't be fixed after DFM .
it depends on how u fix setup violations
1. can be register balacing
2. reducing combo logic
3. by clock skewing.
setup fix may lead to hold violations . for example to reduce setup the hold window will get reduced if combo logic is reduced. ot if you skew the clock late setup will improve but hold time will be eaten up
dada