Bulk in special state in l-edit

Hi dears
I have a sram whose body of some transistors are connected to a specific node of circuit (not vdd or GND). now, in layout, how to draw these transistors? i.e where do their bulks connect in L-Edit?
Many thanks always for ur helps

Guess this concerns PMOS transistors in a common n-well. You may connect the n⁺ tap of this n-well to any voltage > GND (even > vdd , if necessary).

There is some interest in body biasing for low power /
low voltage operation (and "unusual environments" which
I will not get into here). Playing with the body effect,
basically.

If you need a free body terminal for both device types
then you need a twin-well (or triple), or an SOI process.
Or, the entire PSUB on a cheapo-o technology would be
biased to something other than chip-scale ground, which
(in my opinion) is a hurt waiting to happen (noise for
sure, latchup quite possibly, pattern dependent timing
variability almost certainly).

And on a cheap-o technology there would be no expectation
that anyone would disconnect PSUB from GND, and NMOS
devices probably have a global net connection built into
the symbol / netlisting code. You would have to break
that and revise PDK infrastructure (or, maybe use a
generic library primitive and refer it to the same model,
but with altered connectivity, if the PDK is not editable -
which is fine, until you get to layout verification....