lastdance
Advanced Member level 4
Has anyone built a circuit capable of generating a ramp rate of 1V/ms or slower using on-chip capacitor?
What I have done is to scale down the current, to about 20nA.
Concerns:
1. Can this current be leaked away?
2. Noise
3. Variation from designed value, for instance, if 20nA is derived from current mirroring and scaling, this current is going to be largely undeterministic until we see silicon.
Comments welcomed, especially those who has worked on current at this level.
Thanks :flasingsmile:
What I have done is to scale down the current, to about 20nA.
Concerns:
1. Can this current be leaked away?
2. Noise
3. Variation from designed value, for instance, if 20nA is derived from current mirroring and scaling, this current is going to be largely undeterministic until we see silicon.
Comments welcomed, especially those who has worked on current at this level.
Thanks :flasingsmile: