BSDArchitect io_pad problem

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ppmax1029

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I am useing BSDArchitect to insert boundary scan cell. I have my own io_pad but BSDArchitect couldn't recognize them. It inserts its io_pad. So the result has two io_pad: mine and BSDArchitect's.

My pad is constructed by gates. Is there a way to solve it?
 

It was long time ago, so I'm not sure exactelly will it help or not. I added following text at io_pad module definition:

Code:
module io_pad(...);

specify
specparam mgc_dft_cell_type = "bidirectional_pad";
specparam mgc_dft_pin_type$PADIO = "pin";
specparam mgc_dft_pin_type$DIN = "data_output";
specparam mgc_dft_pin_type$DOUT = "data_input";
specparam mgc_dft_pin_type$EN = "output_enable_h";
endspecify

endmodule

Check Mentor's docs - solution must be there.
 

Thanks for replying.

This is what I see in Mentor's Process Guide. But in this way, we have to use io_pad that is defined by Mentor. Could we use our self-defined io_pad in another way?

 

I meant that you should add to YOUR pad definition.

Code:
specify
specparam mgc_dft_cell_type = "bidirectional_pad";
specparam mgc_dft_pin_type$PADIO = "pin";
specparam mgc_dft_pin_type$DIN = "data_output";
specparam mgc_dft_pin_type$DOUT = "data_input";
specparam mgc_dft_pin_type$EN = "output_enable_h";
endspecify

In my case it was not Mentor's pad, I add specify to TSMC's IO pad.
 

Recently,I am using BSDArchitect to insert boundary scan cell and meeting the same problem about the custom io_pad lib too. Did you solve this problem? My custom io_pads have many other port which the generic cell cann't map ,such as the some signals about the driver mode seletion. What can I do to make own io_pad lib? Thank you very much .
 

kornukhin's anwer is correct. BSDArchitect can recognize custom io_pads as long as you add specify definition into your io_pads.

 

yes,but what I meet is that some pin I don't know how to define,such as some signal port output pull down resistor enable .There is nothing can map it .
for example :

generic io
module bidi_enable_high (pin, dout, oe, din);
inout pin;
input dout, oe;
output din;
endmodule

module my_bidi (signal_do,signal_oe,signal_pd,signal_pu,signal_pin0,signal_pin1,signal_c,signal_en,pad_out,vref_pioa,signal_rcomp,test_en);
inout ..;
input ..;
output ..;
endmodule

specparam mgc_dft_cell_type = "bidirectional_pad";
specparam mgc_dft_pin_type$c=signal_c = "pin";
specparam mgc_dft_pin_type$pad_out = "dout";
specparam mgc_dft_pin_type$signal_do = "din";
specparam mgc_dft_pin_type$signal_en = "oe";

//but there is a question about how to map the rest signals.whether should i map those signals to nonexistent?
endspecify
 

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