Alice Lee
Newbie level 6
Hi, everyone. I tried to design a bootstrapped switch whose resolution is 13b. the sampling frequency is 100MHz, the input signal frequency is 1.27MHz. And i took this paper as reference.
B. Razavi, "The Design of a Bootstrapped Sampling Circuit [The Analog Mind]," in IEEE Solid-State Circuits Magazine, vol. 13, no. 1, pp. 7-12, Winter 2021, doi: 10.1109/MSSC.2020.3036143.
I'm so confused that if the amplitude of the input signal is small(e.g. 100mV) then the sampling capasitance should be very large(~hundreds pF), it's not practical,is there another structure can solve this problem, or am i wrong?
B. Razavi, "The Design of a Bootstrapped Sampling Circuit [The Analog Mind]," in IEEE Solid-State Circuits Magazine, vol. 13, no. 1, pp. 7-12, Winter 2021, doi: 10.1109/MSSC.2020.3036143.
I'm so confused that if the amplitude of the input signal is small(e.g. 100mV) then the sampling capasitance should be very large(~hundreds pF), it's not practical,is there another structure can solve this problem, or am i wrong?