Hello all,
In razavi's design of analog CMOS integrated circuit, chapter 3, it states/shows that body effect decrease the output resistance.
But I find it puzzling. I bias the NMOS source with a certain voltage, eg 0.3V.
Setup 1: Base and Source are connected together to 0.3V bias. (No body effect)
Setup 2. Source is connected to 0.3V whilst base is connect to ground. (with Body effect)
Id=(Vgd-Vth)^2K.
Based on the equation, setup 2 Vth will be greater than setup 1, hence reducing Id, hence increase output resistance. Am I right in the analysis?
If that is the case how does body effect reduces output impedance?
Appreciate all help in helping me understanding the fundamental.