Bode plots are a waste of time for stability analysis of current mode SMPS's?

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treez

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In the following article by Dr Engelhardt....

https://www.linear.com/solutions/4672

Dr Engelhardt says...


Dr Engelhardt appears to be saying that the way to assure stability of a current mode switcher is simply to use the values on the datasheet circuit, and then start it up, and if it doesn't oscillate, then your job of stabilising the SMPS is done.

Is that really true?
 

NOT quite. He states how it is more useful to skip the frequency domain simulation and start with time domain simulation to optimize stability of overshoot.

He points out how to stay in "current-mode" so that it becomes inherently stable.

Use variables are input voltage and output step currents. Design choices depend on priorities, cost, performance, reliability. After these choices are verified, then your job is done.
 
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When you get out of simulation and build a circuit, it seems like a good idea to do an FRA on the loop to confirm the performance. Right?

I am a relative newcomer to SMPS design. From what I have learned so far, is that simulation is only marginally useful unless you are really trying something new and novel. The actual components on an actual PCB with all the parasitics can totally disable a circuit that looks great in simulation.
 

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