Block box design error in Vivado

Status
Not open for further replies.
K

kommu4946

Member level 4
Joined
Feb 21, 2014
Messages
71
Helped
13
Reputation
26
Reaction score
11
Trophy points
1,288
Location
India
Visit site
Activity points
1,846
Hi all, iam getting fallowing error in vivado..
[Opt 31-30] Blackbox design_2_i/TOP_0/U0/USER_LOGIC_I/Integration/MAC/FIFO/fifo (data_fifo) is driving pin I4 of primitive cell design_2_i/TOP_0/lmac_out_phy_frame_value[0]_INST_0. This blackbox cannot be found in the existing library.
Click to expand...

I added all the required ngc and mif files but still iam getting this error..I am getting this error for the modules which need ngc files only..
 

Vivado doesn't natively use ngc files from ISE.

Is this a FIFO IP core from ISE you are trying to use? How did you read this file in? Did you start a post synthesis project or did you use read_edif to read in the ngc file.

What version of ISE was the core from and what is the version of the core. Also what version of Vivado are you using?

If possible I would re-generate the cores within Vivado.

Regards
 

ads-ee said:
What version of ISE was the core from and what is the version of the core. Also what version of Vivado are you using?
If possible I would re-generate the cores within Vivado.

Regards
Click to expand...
I am using ise 14.4 ,vivado 13.3.The ip core is fifo 9.3 version.It worked fine when i changed hierarchy update to manual compile order in vivado design source window.
 

Okay, I understand that you're migrating an ISE project to Vivado. I had the same issue with having to use manual compile order to get around problems with the cores on a migrated ISE project.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…