Blackfin BF533 address bits

blackfin bf533

It is said in the BF533 datasheet that there are 32 address bits, but from the processor there are only 19 address bits are present. Can anyone explain the same?

blackfin bf533 beginner

abhijitpethkar said:

It is said in the BF533 datasheet that there are 32 address bits, but from the processor there are only 19 address bits are present. Can anyone explain the same?

Click to expand...

internal adress space is 32 bit width.
external memory, which is accessed throug EBUI, is mapped to sereral regions.

19 bit adress bus width allows to adress 1Mbyte of external STATIC memory. with 4 chip select AMS[3:0] pins external static memory is mapped to four 1Mbyte pieces at adresses 0x2000000, 0x2010000, 0x2020000 and 0x2030000.

also it is possible to connect dynamic memory up to 128MByte, which is mapped to adress 0x00000000 - 0x08000000.

dynamic memory adressed a little bit different that static.
there are 2 adresses: row and column. each could be set, uhm.., let's say, independently. so you need approximetly 2 times less adress pins. approximetly
because theses adresses width could be different, for example
chip MT48LC16M16:
4banks * 8192rows * 512columns * 16 bits gives you 256Mbits = 32Mbytes, which could be adressed by 13 adress lines + 2 bank select lines.

blackfin bf533 datasheet

Thank you for the answer. I would like to ask some more doubts as I am a beginner in the processor

1. How is it that the internal and external memory spaces mapped? As the total address mapped from the external memory is only 2^19 = 524288 memory spaces then how is it that the rest of the memory spaces used.

2. If we are using 4 chip selects also then the total memory spaces used will be 4*524288 = 2097152.

The complete memory address in the asynchronous memory bank is 4M, so we will be essentially be using only half of the memory space. Is my calculation right?


Kindly guide me...

blackfin asynchronous memory read

abhijitpethkar said:

1. How is it that the internal and external memory spaces mapped? As the total address mapped from the external memory is only 2^19 = 524288 memory spaces then how is it that the rest of the memory spaces used.

Click to expand...

Have you ever look into the datasheet?
(hint: page number 6)

abhijitpethkar said:

2. If we are using 4 chip selects also then the total memory spaces used will be 4*524288 = 2097152.
The complete memory address in the asynchronous memory bank is 4M, so we will be essentially be using only half of the memory space. Is my calculation right?

Click to expand...

No. External data bus width is 16. And actually you have [A19:A1] adress lines, not [A18:A0]