I am having a memory (depth = 64, width = parameter) to be read fully and put it in a 1-D array (width = 64*memory data width). Only 1 row can be read at a time.
This is the verilog code I have written
I am getting an error during compilation related to constant parameter for following operations (mem_addr + 1)*MEM_DATA_WIDTH and mem_addr *MEM_DATA_WIDTH
Can anyone tell me how to fix this error?
Thanks in advance.
Can anyone help me how to fix this error if it is because of inappropriate syntax?
And if it is not just a syntax error then what should I do to get that functionality in my design?
Honestly you need to write good comments in your code.
What you want is to build a demultiplexer to select the 32-bit bit slice of the 64*32-bit wide fsm_out and load your 32-bit data into it.
Code Verilog - [expand]
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// part selects take the form:// [lower_starting_index +: width_of_slice] or// [upper_starting_index -: width_of_slice]// therefore....
fsm_out [mem_addr*MEM_DATA_WIDTH-1+:32]= mem_data_i;// blocking assignment as this // is a combinational always block
Your understanding is right. But the error still exists with the following operation
mem_addr*MEM_DATA_WIDTH
As MEM_DATA_WIDTH is a constant (parameter) while mem_addr is a variable (reg).
I am using cadence ncsim version 14.2
It might be a simulator problem as I also remember that Modelsim supports it.
BTW, can any work around be done instead of using ugly Case statement ?
I don't want to use case statement because in future mem_addr can be 10 bit also (memory depth may change), so writing 1024 case items isn't a good idea.
You can check the documentation for ncsim and see if it defaults to '95 support only and you need to enable 2001 support. I'd be very surprised if it really doesn't support the part select syntax.
The for loop should unroll into identical code with the other versions.
You talk about this being memory, but this code probably doesn't synthesize to a memory. It doesn't conform to any standard inferred memory template. The standard templates use an array.