rca,
"I don't Know free tool" - so, what tools can generate BIST for the memory? which of them would you recommend?
As for the BIST Controller, is it always the same (from design to design)? If I want to test several memories in parallel, should I have several BIST Controllers?
As far as I know, there is not necessary to generate a BIST for each memory - a single BIST might be shared by several memories or, in another words, memories on the chip might be grouped for a single BIST usage. Is that correct? Could you please give more details?
"you need to estimate the bIST test time" - how could I do so? BIST works on several algorithms, which are not trivial at all... How this estimation might be done?
Thank you in advance for your response!
---------- Post added at 13:00 ---------- Previous post was at 12:46 ----------
What consideration should usually be taken into account while creation BIST logic?
---------- Post added at 13:32 ---------- Previous post was at 13:00 ----------
Could several Memories be tested in parallel by a single BIST Controller?