Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Biasing Maneatis load ring oscillator

Status
Not open for further replies.

strennor

Advanced Member level 4
Full Member level 1
Joined
Dec 9, 2003
Messages
104
Helped
18
Reputation
36
Reaction score
3
Trophy points
1,298
Activity points
488
maneatis load

Hi,

For the biasing of Maneatis type load delay buffer, I think the biasing tail NMOS should be same size as the buffer tail NMOS.
Then the Vbp is equal to the min swing limit, since all the tail current is now in only one branch of the differential buffer.


But it is noted as half.

Why? Anyone can help?

0_1236960321.jpg
 

maneatis

Hello???

Nobody knows it???
 

maneatis ring oscillator

can you explain ur problem clearly
 

oscillator maneatis delay cell

Hey strennor,
can i know from where did u get this sizing?

It's my first time to design a vco & it was recommended to use maneatis delay cell ... & i was searching for a methodology for sizing....

Thanks
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top