daniel442
Junior Member level 2
Hi,
I am trying to find the right method to Bias a cascode amplifier with cascode PMOS load. I have read Razavi CMOS chapter 9 of single stage opamp and Sansen book to find only general theoretical answers and not practical ones... also search this forum as well.
I have set Vbat=2V, Ibat~1mA. my technology is tsmc130nm with Vth~400mV.
I've tried 2 methods -
1. "cadence monkey" - just play with each transistor until it is in saturation region and then continue to the next one
2. assuming Vod on all of the transistors and then using gmoverid to calculate W while L is fixed on 130nm
both methods give me hard time. below is my circuit after implement some calculations -
does M3 determine the circuit Ids ? or is it the configuration of all the 4 together ?
does I need Vds to be small on every transistor from top to bottom in order to reach enough Vd on M1 (the amplifier device) ?
appreciate your help
I am trying to find the right method to Bias a cascode amplifier with cascode PMOS load. I have read Razavi CMOS chapter 9 of single stage opamp and Sansen book to find only general theoretical answers and not practical ones... also search this forum as well.
I have set Vbat=2V, Ibat~1mA. my technology is tsmc130nm with Vth~400mV.
I've tried 2 methods -
1. "cadence monkey" - just play with each transistor until it is in saturation region and then continue to the next one
2. assuming Vod on all of the transistors and then using gmoverid to calculate W while L is fixed on 130nm
both methods give me hard time. below is my circuit after implement some calculations -
does M3 determine the circuit Ids ? or is it the configuration of all the 4 together ?
does I need Vds to be small on every transistor from top to bottom in order to reach enough Vd on M1 (the amplifier device) ?
appreciate your help