Hi,
Do you agree the attached (LTspice and jpeg), is the best way to parallel SMPS?
The Voltage error amp signal is passed to the other SMPS's via an AD8226 (X1 Gain) InAmp.....this means that even if the local ground potential at each Buck is different, each buck will still receive the same signal to its current error amplifier (due to the InAmp)
In my limited experience, I had good luck using current mode control
and turning N-1 error amps into followers of the first. But you need
the right access (we designed the chips, so...).
How good does the sharing need to be? Is this N+K or more like
"N or I'm dead"? Have you a spec on ground offset that lets you
validate the inst amp solution or the need for it? Woyld seem
prone to add loop lag....
Thanks, the InAmp has a unity gain bandiwdth of 1500kHz, so we were thinking it woudlnt create loop lag.
Also, AYK, from the InAmp datasheet...
"""AD8226 can handle voltages beyond the rails. For example, with a ±5 V supply, the part is guaranteed to withstand ±35 V at the input with no damage""""
.......As such, the local ground at each converter can be many volts differet from the other local grounds, and it doesnt matter one jot......this, AYK, is what makes the solution of the top post, the absolute best of the best in SMPS paralleling.