josipb
Newbie level 4
ber tester design
Hi!
I want to design a BER Tester for measuting the sensitivity of the RF receiver. I divided the instrument design in a Pulse Pattern Generator and an Error Detector. The Pulse Pattern Generator genarates a pseudo-random sequence that is sended to the modulation input of RF signal generator connected to the receiver under test. The receiver demodulates the signal and send it to the Error Detector. The Error Detector must compare this signal with the pseudo-random sequence generated by the Pulse Pattern Generator and calculate the BER. My questions are:
When the bit can be considered an error? For a correct bit reading it must be at its logical level for all period or a % of the period? When must I read the value of incoming bit? At the half of period or in another time?
Hi!
I want to design a BER Tester for measuting the sensitivity of the RF receiver. I divided the instrument design in a Pulse Pattern Generator and an Error Detector. The Pulse Pattern Generator genarates a pseudo-random sequence that is sended to the modulation input of RF signal generator connected to the receiver under test. The receiver demodulates the signal and send it to the Error Detector. The Error Detector must compare this signal with the pseudo-random sequence generated by the Pulse Pattern Generator and calculate the BER. My questions are:
When the bit can be considered an error? For a correct bit reading it must be at its logical level for all period or a % of the period? When must I read the value of incoming bit? At the half of period or in another time?