Behaviour Model for 8-bit Ideal DAC

[snoop835]

hspice ideal dac

Hi everyone!

I wanted to investigate R2R 8-bit DAC performance i.e. Gain Error. To do this I need compare the actual DAC slope vs ideal slope. Now I will need to create a netlist for 8-bit ideal DAC using Star-HSpice. I have some reference SPICE netlist to generate ideal slope. However when I tried to run using STAR-HSPICE, it won't work.

I got the reference netlist from:
**broken link removed**

Is this a correct way to investigate the DAC performance in time-domain analysis? Can you guys suggest any good reference on how to generate ideal 8-bit DAC using Star-HSPICE?

Many thanks..cheers

 

[flushrat]

hspice ideal dac model

use E.. elements

 

[snoop835]

ideal slope dac

Thanks for the tip flushrat. But I still couldn't get what do you mean by using E element. I think i need to modify the switches for use in Star-HSPICE, since it doesn't recognise model VSWITCH.

Anyone has good suggestion on this?

cheers