Bingo600
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hct594
Hi
I am a total newbie in HDL
But now i might have a thing where a CPLD could come in handy
I have gotten some 8x8 LED blocks Red/Green (See attached DS)
And i would like to build a display with 8 of those blocks , and control them with an Atmel Mega16 or Mega32.
Each 8x8 block have 24 pins so its 8 x 24 pins in all.
I was thinking about driving each block by a ULN2803 , but need 2 x 8 pins for each block for multiplexing thr Red/Green leds.
I was thinking about using HCT594 for multiplexing the red/green rows.
I was thinking i could just use 2 of those , one for all red .. and one for all green.
Then i would control each collum of the 8x8 blocks via a ULN2083 gate , but i'd need 64 lines :-(
But then i thought this might be my "Intro to CPLD's".
Would it be smarter to use a CPLD ??
Is this too big a VHDL task for a newbie ??
I guess i could make it as "Schematic" in Xilinx Webpack.
I have a Xilinx 95108@84-PLCC , and an @ltera MAX108@84-PLCC at home , can i use that or is there not enough pins ??
I really dont know if this belongs in "Elementary Electronic Questions" forum.
If it does maybe one of the mods would move it there.
But the thing i really ask here is :
And for that you guyzz are probably the best to ansver.
/Bingo
Hi
I am a total newbie in HDL
But now i might have a thing where a CPLD could come in handy
I have gotten some 8x8 LED blocks Red/Green (See attached DS)
And i would like to build a display with 8 of those blocks , and control them with an Atmel Mega16 or Mega32.
Each 8x8 block have 24 pins so its 8 x 24 pins in all.
I was thinking about driving each block by a ULN2803 , but need 2 x 8 pins for each block for multiplexing thr Red/Green leds.
I was thinking about using HCT594 for multiplexing the red/green rows.
I was thinking i could just use 2 of those , one for all red .. and one for all green.
Then i would control each collum of the 8x8 blocks via a ULN2083 gate , but i'd need 64 lines :-(
But then i thought this might be my "Intro to CPLD's".
Would it be smarter to use a CPLD ??
Is this too big a VHDL task for a newbie ??
I guess i could make it as "Schematic" in Xilinx Webpack.
I have a Xilinx 95108@84-PLCC , and an @ltera MAX108@84-PLCC at home , can i use that or is there not enough pins ??
I really dont know if this belongs in "Elementary Electronic Questions" forum.
If it does maybe one of the mods would move it there.
But the thing i really ask here is :
For any hints in doing this with a CPLD
And for that you guyzz are probably the best to ansver.
/Bingo