basic circuit block in pll or clock generator

[baichi]

Hi all, the attach is a basic circuit block using in pll or clock generator, maybe it's a osillator or latch or whatever, the problem is I don't know the exact detail of this circuit.If anyone knows the solution please help me .

regards

 

[baichi]

Actually, this structure is a kind of top new tech now, I do my IC design engineer job for 4 years and I havn't seen it before. I will appreciate you guys help.

 

[AdvaRes]

Hi,
The circuit is incomplete. I thing (if completed) it gives a 5 inverters differential VCO.

 

[baichi]

hi AdvaRes,
at very beginning, I thougt it was VCO, but now, I think maybe it's a CML mode divider using in PLL. each block is a D filp-flop. I am not very sure.

Added after 5 minutes:

I say it is not a VCO for the reason that we have already recognized our VCO in our system. we use LC-VCO and L is not included in this part.