Bandgap VREF with Enable transient problem

[vrefdesigner]

Hi everyone,

I'm designing an opamp-based beta-multiplier bandgap voltage reference with enable for thesis. However, I encountered a problem when enabling the vref from shutdown state (EN=1) to active state (EN=0). Please see simulation attached below.

As you can see, vref settles at 0.9V initially before fully settling to the correct value. I would like to know what the possible causes of the problem are. I'm thinking this is due to the charging of the BJT's parasitic caps and/or input pair's parasitic caps, but I'm not entirely sure/convinced it is the reason.

Info you may want:
* 8:1 BJT (5x5 unit area) ratio
* I_bjt=2uA
*

Bandgap vref architecture for reference

 

[BigBoss]

It's obvious that a capacitive effect disturbs the behavior.
I see a "series connected capacitance effect" but I cannot say more than this without seeing the circuit.
If there are BJTs in your foundry, there should be some other variants for different applications. It's worth to try with lower C-E capacitance feature.( if there is )

 

[dick_freebird]

Question #1 is, "what's the problem?".
Power-on transients are inevitable to some degree. The acceptable degree, is Question 1a.

Could be that the first plateau is the startup ckt biasing the ref pair and op amp settling to that, and the second is startup release, or something like that. As the transitions appear abrupt you ought to be able to map out the sequence of events.