i'm design a bandgap voltage and simulate it with hspice. how can i simulate and validate my bandgap design correct or not without using startup circuit?
is it using .tran xx xx uis and .ic v(x)=xx to initialize some node to the specific voltage?
Remove the startup ckt from ur bandgap reference,but remember that the operating point of bandgap ckt is resetted and ensure the bias voltage of bandgap reference is ok.
Run!