Bandgap voltage simulation

[chunlee]

hi,

i'm design a bandgap voltage and simulate it with hspice. how can i simulate and validate my bandgap design correct or not without using startup circuit?

is it using .tran xx xx uis and .ic v(x)=xx to initialize some node to the specific voltage?

thanks.

 

[eng_Semi]

make transient analysis and put a pulse on the vdd or the enable if exists.

 

[hr_rezaee]

Remove the start up circuit the circuit will usually work. sometimes the permofrmance even improves.

 

[huojinsi]

Remove the startup ckt from ur bandgap reference,but remember that the operating point of bandgap ckt is resetted and ensure the bias voltage of bandgap reference is ok.
Run!

 

[sdmodulator]

start performance need to careful simulation in different temperature.