You first need a startup circuit to put the core at a bias current
which allows it to operate as a poor man's op amp loop (pA
means gm is trivial and probably wrong). This is always fun,
getting robust startup across decades of leakage and VT
variation while never letting that current "bend" the PTAT.
I prefer a switched resistor that VBG coming up, turns off.
Some hysteresis here is good but may give DC OP /
sweeps a hard time.
The PTAT core is swung by your "vstack" and "vstack"
is the -outcome- (VBG) as well. The loop has to pick the
right answer and the outer loop (op amp) was deleted.
For this core to work as-is-ish one of the BJTs needs to
be connected C-B ("transdiode"). You can make the top
mirror simple (P : P w/ same W) or add a skosh of
cross-coupled gain there, must not allow this to become
hysteretic though.
Then you can push or pull startup current at one of the
diode-connected devices and see the "vstack" snap in and
the startup error current go away, leaving you with a reference.
Those presistors probably have a TC1=TC2=0, which is
wrong unless you're using metal thin film resistors (these
have close enough to 0 TC to make a bandgap difficult;
silicon resistors have a stronger tempco and that makes
a flat output TC (from PTAT active and NTAT passive
current-balance). But silicon resistors have a complex
(bowed) tempco which adds to error-band.