conmourtz
Member level 1
- Joined
- Mar 29, 2012
- Messages
- 36
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- 1,286
- Location
- Volos, Greece
- Activity points
- 1,529
Hello all,
I downloaded the axi2ahb bridge project from opencores and i am trying to synthesys it at design compiler. i am looking to find the right period for the circuit. with 3.5 ns period i have slack and hold violations 0 (the minimum with slack, holds 0). is there any propper period that arm circuits works? i read somewhere that the frequency should be about 100MHZ. is that right?? please help me.
I downloaded the axi2ahb bridge project from opencores and i am trying to synthesys it at design compiler. i am looking to find the right period for the circuit. with 3.5 ns period i have slack and hold violations 0 (the minimum with slack, holds 0). is there any propper period that arm circuits works? i read somewhere that the frequency should be about 100MHZ. is that right?? please help me.