AXI fixed burst for multiple transfers

[john_cooper]

Hi all

In fixed burst in AXI my testcase has the following field values:

length=3 (three transfers)
addrs = 'h100
wr_Data=abcd_dcba
kind=fixed
size= sixteen_words (512 per transfer)

Since the FIXED has a same address for three transfers in a burst it writes the data in first transfer and the rest of the two transfers has 'h0 being sent. While reading back it read back ZERO.

How do you implement the testcase to read back the first written data for a FIXED burst with multiple transfers?
This works fine for single transfer.

 

[SynthWorks]

When you are doing a fixed transfer, where is the data going to? Most likely it is an an IO device where you are writing into a transfer FIFO or holding register for the interface. To read these values, you would need to check that the receiving side of the interface received the correct value sequence.

If you are going to a memory device, you can read and write values, but you will probably want an incrementing type transfer in that case.

 

[dpaul]

Two things while working with AXI4 full fixed burst.
1. The AWADDR must not change until fixed burst the transfer is completely done.
2. Your write state-machine needs to take care of the subsequent WDATA value for the 2nd beat onwards. What you send for the subsequent transfers/beats on the WDATA is what is written to the slave. So if you are sending 0s for the 2nd and 3rd beat, that would be written to the slave memory, and when you read that value out, it will be 0s.