Automotive Load Dump protection by a simple comparator and in-line FET switch?

Hello,

Is the below solution to Automotive Load Dump for a LED headlight acceptable?

It certainly works fine.....as soon as the battery bus voltage goes above 20V, the comparator switches off the in-line PFET, and the overvoltage doesn't get on to the electronics circuitry of the Headlamp's LED driver.

Would this solution be deemed acceptable by the authorites?
(LTspice simulation and schematic attached)

That would probably come down to the residual voltage
& current surge seen by the LED (and any associated
electronics). You'd have to dig deeper into component
details to see whether every single piece is up to the
(say) 50V-for-few-uS overshoot - not enough to say
the comparator & FET will clip at 20V, there is finite
delay in that circuit (what is your 2N3904 turnoff time
from saturation, esp. when hot?) and the load-dump
risetime is naturally pretty fast. Your source model does
not look like it expresses any of that realistically. Best
to find some blessed SAE load-dump scenario waveform
and see what it shows you.

"Authorities" will surely want more than a schematic with
a static (nil) threat input before they deem much of
anything.

I am confident that the load dump can be curtailed at 20V....its going to be microseconds for the comparator to act. If necessary, an inductance can be placed in the supply wire to hold up the current of the load dump.
If its still a threat, then we could put a 20V transorb in the headlamp........this would only conduct for a few microseconds till the comparator acted so it woul dnot overheat..
I think looking at that circuit, its obvious to yourself and others that this can easily (perhaps with minor modification) stop the voltage at the electronics from riding up above 20V.
The question is will the authorities find some feature about it that they don't like.?

I simply do not share your optimism about response time
and whether that's fast enough to save the converter.
So I still recommend you dig until you find a threat model
for load dumb that some of these "authorities" have seen
fit to bless. They want compliance, to something. Bet on
that, and find it. Then you can set about proof.

What I see in a casual Googling is all about "typical"
pulses and says 5mS risetime. That ought to not tax
your comparator & saturated NPN too badly. But the
open literature doesn't assert anything for the min
rise time, which is your speed challenge.You might
find a few microseconds by making the "scram" path
use transistors turning on, rather than off. Like a
passive PMOS gate turnon (res to Gnd) and a fast
PNP shunt G-S, driven by a turning-on NPN from the
comparator (or just a dumb series zener of 18V or so).

In that searching, several purpose-specific load dump
protection ICs turned up, including from LTC. These
might be suitable and easier to "sell off" to reviewers
as they are made for the job, no surprises, probably
familiar to whoever.

There is indeed a chip called LT4356 by linear.com that appears to be suitable.
http://cds.linear.com/docs/en/datasheet/4356fa.pdf

..however, closer inspection of the datasheet reveals that like most IC's on the market, they have disadvantages which are only explained well down in the datasheet.
-In the case of LT4356, it needs a minimum 22uF "electrolytic" capacitor at its output, as explained on page 16 of the datasheet.
If such a capacitor is not used, then the mosfet gate controller oscillates whilst it tries to regulate the output to 27V in the event of an overvoltage surge.
-kind of makes the LT4356 less than useful , as the last thing that is wanted inside automotive led lights is electrolytic capacitors...

This is why I believe the circuit that I present here (in the top post) is far more useful, do you agree?