Automatic RTL generation Software

I have been recently intrigued by the idea of a Automatic RTL generation i.e. a software which takes in design specs in some f
ormat and presents a RTL model for the same
1) Is there any software currently which do something remotely similar to this? If yes, kindly provide details of the same.
2)Is some research work going on this area? (I think there is, atleast in software side they are trying to create programs which creates program to solve a particular problem. It would be helpful if you could point to me in a direction to look for material to read on this topic)

I read this paper **broken link removed** . In it, their algorithm was able to create a design with certain intended specs.

I fancy doing something of this kind as a hobby. All help would be appreciated.

There is no software which does that....to the efficiency that is needed.
VHDL/Verilog --> kind of C++ language --> Translates in the digital gates.===> RTL
Design Compiler --> C++ compiler --> Translates into hardware/binaray language.===> Generic

The difference between two is mainly how data/control flow progresses. RTL is more "parallel" while Generic software is "more" sequential. there has been attempts to bring in features of hardware in the form of SystemC which can be compiled directly into gates.
The RTL+Verilog+Design_compiler are designed to solve a different problem than Generic software. This is a big research topic.....as even in hardware design : Matlab helps in mixed signal designs, GPUs are done differently in hardware......
In simple terms .....you have transportation : Toyota is for public use, Buses are public use, trains for long distance.....each one caters to different category...and has benefits and disadvantages....